In the autumn semester, a prototype Doppler radar speed detector was designed and built. The output signal of the HB100 Doppler radar sensor, was filtered and amplified before processing the signal to measure its frequency using the STM32 microcontroller. The measurement of frequency was carried out using two different techniques:
In the spring semester, the aim was to design and build a display board for the prototype Doppler radar speed detector to indicate the speed of an object moving in front of it. This was implemented using a Complex Programmable Logic Device (CPLD) which would receive the information from the STM32 microcontroller through UART and display the speed on seven-segment displays.